From 04fcf681769af2241afb1d7df8053589c95ae1d7 Mon Sep 17 00:00:00 2001 From: Dentomologist Date: Sat, 17 Jun 2023 11:48:03 -0700 Subject: [PATCH] xEmitter: Convert PrefetchLevel to enum class --- Source/Core/Common/x64Emitter.cpp | 2 +- Source/Core/Common/x64Emitter.h | 10 +++++----- Source/UnitTests/Common/x64EmitterTest.cpp | 8 ++++---- 3 files changed, 10 insertions(+), 10 deletions(-) diff --git a/Source/Core/Common/x64Emitter.cpp b/Source/Core/Common/x64Emitter.cpp index 8cd375c8c6..a050c68b29 100644 --- a/Source/Core/Common/x64Emitter.cpp +++ b/Source/Core/Common/x64Emitter.cpp @@ -920,7 +920,7 @@ void XEmitter::UD2() void XEmitter::PREFETCH(PrefetchLevel level, OpArg arg) { ASSERT_MSG(DYNA_REC, !arg.IsImm(), "PREFETCH - Imm argument"); - arg.operandReg = (u8)level; + arg.operandReg = static_cast(level); arg.WriteREX(this, 0, 0); Write8(0x0F); Write8(0x18); diff --git a/Source/Core/Common/x64Emitter.h b/Source/Core/Common/x64Emitter.h index 6a6c7b64f2..8d964b6d2a 100644 --- a/Source/Core/Common/x64Emitter.h +++ b/Source/Core/Common/x64Emitter.h @@ -481,12 +481,12 @@ public: void BSR(int bits, X64Reg dest, const OpArg& src); // Top bit to bottom bit // Cache control - enum PrefetchLevel + enum class PrefetchLevel : u8 { - PF_NTA, // Non-temporal (data used once and only once) - PF_T0, // All cache levels - PF_T1, // Levels 2+ (aliased to T0 on AMD) - PF_T2, // Levels 3+ (aliased to T0 on AMD) + NTA = 0, // Non-temporal (data used once and only once) + T0 = 1, // All cache levels + T1 = 2, // Levels 2+ (aliased to T0 on AMD) + T2 = 3, // Levels 3+ (aliased to T0 on AMD) }; void PREFETCH(PrefetchLevel level, OpArg arg); void MOVNTI(int bits, const OpArg& dest, X64Reg src); diff --git a/Source/UnitTests/Common/x64EmitterTest.cpp b/Source/UnitTests/Common/x64EmitterTest.cpp index cd38efdcb7..663ce373b0 100644 --- a/Source/UnitTests/Common/x64EmitterTest.cpp +++ b/Source/UnitTests/Common/x64EmitterTest.cpp @@ -380,10 +380,10 @@ BITSEARCH_TEST(TZCNT); TEST_F(x64EmitterTest, PREFETCH) { - emitter->PREFETCH(XEmitter::PF_NTA, MatR(R12)); - emitter->PREFETCH(XEmitter::PF_T0, MatR(R12)); - emitter->PREFETCH(XEmitter::PF_T1, MatR(R12)); - emitter->PREFETCH(XEmitter::PF_T2, MatR(R12)); + emitter->PREFETCH(XEmitter::PrefetchLevel::NTA, MatR(R12)); + emitter->PREFETCH(XEmitter::PrefetchLevel::T0, MatR(R12)); + emitter->PREFETCH(XEmitter::PrefetchLevel::T1, MatR(R12)); + emitter->PREFETCH(XEmitter::PrefetchLevel::T2, MatR(R12)); ExpectDisassembly("prefetchnta byte ptr ds:[r12] " "prefetcht0 byte ptr ds:[r12] "