[AArch64] Fix a bug in the register cache.

If the register was only a lower pair and it needed the full register, then we need to load the high 64bits.
Which we weren't doing before.
This commit is contained in:
Ryan Houdek 2015-08-26 01:21:43 -05:00
parent 6015e2d812
commit 4f5f29a0fb

View file

@ -281,9 +281,24 @@ ARM64Reg Arm64FPRCache::R(u32 preg, bool only_lower)
switch (reg.GetType())
{
case REG_REG: // already in a reg
case REG_LOWER_PAIR:
return reg.GetReg();
break;
case REG_LOWER_PAIR:
{
if (!only_lower)
{
// Load the high 64bits from the file and insert them in to the high 64bits of the host register
ARM64Reg tmp_reg = GetReg();
m_float_emit->LDR(64, INDEX_UNSIGNED, tmp_reg, X29, PPCSTATE_OFF(ps[preg][1]));
m_float_emit->INS(64, reg.GetReg(), 1, tmp_reg, 0);
UnlockRegister(tmp_reg);
// Change it over to a full 128bit register
reg.LoadToReg(reg.GetReg());
}
return reg.GetReg();
}
break;
case REG_NOTLOADED: // Register isn't loaded at /all/
{
ARM64Reg host_reg = GetReg();