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https://github.com/dolphin-emu/dolphin.git
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MMIO: Port the VideoCommon PE MMIOs to the new interface.
This commit is contained in:
Pierre Bourdon
parent
4129b30494
commit
5b5dfb384e
2 changed files with 82 additions and 150 deletions
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@ -311,6 +311,7 @@ void InitHWMemFuncsWii()
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void InitMMIO(MMIO::Mapping* mmio)
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{
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g_video_backend->RegisterCPMMIO(mmio, 0xCC000000);
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g_video_backend->RegisterPEMMIO(mmio, 0xCC001000);
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VideoInterface::RegisterMMIO(mmio, 0xCC002000);
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ProcessorInterface::RegisterMMIO(mmio, 0xCC003000);
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MemoryInterface::RegisterMMIO(mmio, 0xCC004000);
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@ -16,6 +16,7 @@
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#include "PixelEngine.h"
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#include "RenderBase.h"
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#include "CommandProcessor.h"
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#include "HW/MMIO.h"
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#include "HW/ProcessorInterface.h"
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#include "State.h"
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@ -133,11 +134,6 @@ void DoState(PointerWrap &p)
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p.Do(bbox_active);
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}
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void RegisterMMIO(MMIO::Mapping* mmio, u32 base)
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{
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// TODO
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}
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void UpdateInterrupts();
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void UpdateTokenInterrupt(bool active);
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void UpdateFinishInterrupt(bool active);
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@ -169,145 +165,61 @@ void Init()
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bbox_active = false;
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}
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void Read16(u16& _uReturnValue, const u32 _iAddress)
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void RegisterMMIO(MMIO::Mapping* mmio, u32 base)
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{
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DEBUG_LOG(PIXELENGINE, "(r16) 0x%08x", _iAddress);
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switch (_iAddress & 0xFFF)
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// Directly mapped registers.
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struct {
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u32 addr;
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u16* ptr;
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} directly_mapped_vars[] = {
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{ PE_ZCONF, &m_ZConf.Hex },
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{ PE_ALPHACONF, &m_AlphaConf.Hex },
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{ PE_DSTALPHACONF, &m_DstAlphaConf.Hex },
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{ PE_ALPHAMODE, &m_AlphaModeConf.Hex },
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{ PE_ALPHAREAD, &m_AlphaRead.Hex },
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};
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for (auto& mapped_var : directly_mapped_vars)
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{
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// CPU Direct Access EFB Raster State Config
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case PE_ZCONF:
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_uReturnValue = m_ZConf.Hex;
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INFO_LOG(PIXELENGINE, "(r16) ZCONF");
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break;
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case PE_ALPHACONF:
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// Most games read this early. no idea why.
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_uReturnValue = m_AlphaConf.Hex;
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INFO_LOG(PIXELENGINE, "(r16) ALPHACONF");
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break;
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case PE_DSTALPHACONF:
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_uReturnValue = m_DstAlphaConf.Hex;
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INFO_LOG(PIXELENGINE, "(r16) DSTALPHACONF");
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break;
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case PE_ALPHAMODE:
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_uReturnValue = m_AlphaModeConf.Hex;
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INFO_LOG(PIXELENGINE, "(r16) ALPHAMODE");
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break;
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case PE_ALPHAREAD:
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_uReturnValue = m_AlphaRead.Hex;
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WARN_LOG(PIXELENGINE, "(r16) ALPHAREAD");
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break;
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case PE_CTRL_REGISTER:
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_uReturnValue = m_Control.Hex;
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INFO_LOG(PIXELENGINE, "(r16) CTRL_REGISTER : %04x", _uReturnValue);
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break;
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case PE_TOKEN_REG:
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_uReturnValue = Common::AtomicLoad(*(volatile u32*)&CommandProcessor::fifo.PEToken);
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INFO_LOG(PIXELENGINE, "(r16) TOKEN_REG : %04x", _uReturnValue);
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break;
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// BBox
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case PE_BBOX_LEFT:
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case PE_BBOX_RIGHT:
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case PE_BBOX_TOP:
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case PE_BBOX_BOTTOM:
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_uReturnValue = bbox[(_iAddress >> 1) & 3];
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bbox_active = false;
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break;
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// NOTE(neobrain): only PE_PERF_ZCOMP_OUTPUT is implemented in D3D11, but the other values shouldn't be contradictionary to the value of that register (i.e. INPUT registers should always be greater or equal to their corresponding OUTPUT registers).
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case PE_PERF_ZCOMP_INPUT_ZCOMPLOC_L:
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_uReturnValue = g_video_backend->Video_GetQueryResult(PQ_ZCOMP_INPUT_ZCOMPLOC) & 0xFFFF;
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break;
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case PE_PERF_ZCOMP_INPUT_ZCOMPLOC_H:
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_uReturnValue = g_video_backend->Video_GetQueryResult(PQ_ZCOMP_INPUT_ZCOMPLOC) >> 16;
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break;
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case PE_PERF_ZCOMP_OUTPUT_ZCOMPLOC_L:
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_uReturnValue = g_video_backend->Video_GetQueryResult(PQ_ZCOMP_OUTPUT_ZCOMPLOC) & 0xFFFF;
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break;
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case PE_PERF_ZCOMP_OUTPUT_ZCOMPLOC_H:
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_uReturnValue = g_video_backend->Video_GetQueryResult(PQ_ZCOMP_OUTPUT_ZCOMPLOC) >> 16;
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break;
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case PE_PERF_ZCOMP_INPUT_L:
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_uReturnValue = g_video_backend->Video_GetQueryResult(PQ_ZCOMP_INPUT) & 0xFFFF;
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break;
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case PE_PERF_ZCOMP_INPUT_H:
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_uReturnValue = g_video_backend->Video_GetQueryResult(PQ_ZCOMP_INPUT) >> 16;
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break;
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case PE_PERF_ZCOMP_OUTPUT_L:
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_uReturnValue = g_video_backend->Video_GetQueryResult(PQ_ZCOMP_OUTPUT) & 0xFFFF;
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break;
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case PE_PERF_ZCOMP_OUTPUT_H:
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_uReturnValue = g_video_backend->Video_GetQueryResult(PQ_ZCOMP_OUTPUT) >> 16;
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break;
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case PE_PERF_BLEND_INPUT_L:
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// Super Mario Sunshine uses this register in episode 6 of Sirena Beach:
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// The amount of remaining goop is determined by checking how many pixels reach the blending stage.
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// Once this register falls below a particular value (around 0x90), the game regards the challenge finished.
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// In very old builds, Dolphin only returned 0. That caused the challenge to be immediately finished without any goop being cleaned (the timer just didn't even start counting from 3:00:00).
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// Later builds returned 1 for the high register. That caused the timer to actually count down, but made the challenge unbeatable because the game always thought you didn't clear any goop at all.
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// Note that currently this functionality is only implemented in the D3D11 backend.
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_uReturnValue = g_video_backend->Video_GetQueryResult(PQ_BLEND_INPUT) & 0xFFFF;
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break;
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case PE_PERF_BLEND_INPUT_H:
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_uReturnValue = g_video_backend->Video_GetQueryResult(PQ_BLEND_INPUT) >> 16;
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break;
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case PE_PERF_EFB_COPY_CLOCKS_L:
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_uReturnValue = g_video_backend->Video_GetQueryResult(PQ_EFB_COPY_CLOCKS) & 0xFFFF;
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break;
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case PE_PERF_EFB_COPY_CLOCKS_H:
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_uReturnValue = g_video_backend->Video_GetQueryResult(PQ_EFB_COPY_CLOCKS) >> 16;
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break;
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default:
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INFO_LOG(PIXELENGINE, "(r16) unknown @ %08x", _iAddress);
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_uReturnValue = 1;
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break;
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mmio->Register(base | mapped_var.addr,
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MMIO::DirectRead<u16>(mapped_var.ptr),
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MMIO::DirectWrite<u16>(mapped_var.ptr)
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);
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}
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}
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void Write16(const u16 _iValue, const u32 _iAddress)
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{
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switch (_iAddress & 0xFFF)
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// Performance queries registers: read only, need to call the video backend
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// to get the results.
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struct {
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u32 addr;
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PerfQueryType pqtype;
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} pq_regs[] = {
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{ PE_PERF_ZCOMP_INPUT_ZCOMPLOC_L, PQ_ZCOMP_INPUT_ZCOMPLOC },
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{ PE_PERF_ZCOMP_OUTPUT_ZCOMPLOC_L, PQ_ZCOMP_OUTPUT_ZCOMPLOC },
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{ PE_PERF_ZCOMP_INPUT_L, PQ_ZCOMP_INPUT },
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{ PE_PERF_ZCOMP_OUTPUT_L, PQ_ZCOMP_OUTPUT },
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{ PE_PERF_BLEND_INPUT_L, PQ_BLEND_INPUT },
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{ PE_PERF_EFB_COPY_CLOCKS_L, PQ_EFB_COPY_CLOCKS },
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};
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for (auto& pq_reg : pq_regs)
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{
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// CPU Direct Access EFB Raster State Config
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case PE_ZCONF:
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m_ZConf.Hex = _iValue;
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INFO_LOG(PIXELENGINE, "(w16) ZCONF: %02x", _iValue);
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break;
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case PE_ALPHACONF:
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m_AlphaConf.Hex = _iValue;
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INFO_LOG(PIXELENGINE, "(w16) ALPHACONF: %02x", _iValue);
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break;
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case PE_DSTALPHACONF:
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m_DstAlphaConf.Hex = _iValue;
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INFO_LOG(PIXELENGINE, "(w16) DSTALPHACONF: %02x", _iValue);
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break;
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case PE_ALPHAMODE:
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m_AlphaModeConf.Hex = _iValue;
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INFO_LOG(PIXELENGINE, "(w16) ALPHAMODE: %02x", _iValue);
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break;
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case PE_ALPHAREAD:
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m_AlphaRead.Hex = _iValue;
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INFO_LOG(PIXELENGINE, "(w16) ALPHAREAD: %02x", _iValue);
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break;
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mmio->Register(base | pq_reg.addr,
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MMIO::ComplexRead<u16>([pq_reg](u32) {
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return g_video_backend->Video_GetQueryResult(pq_reg.pqtype) & 0xFFFF;
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}),
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MMIO::InvalidWrite<u16>()
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);
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mmio->Register(base | (pq_reg.addr + 2),
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MMIO::ComplexRead<u16>([pq_reg](u32) {
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return g_video_backend->Video_GetQueryResult(pq_reg.pqtype) >> 16;
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}),
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MMIO::InvalidWrite<u16>()
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);
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}
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case PE_CTRL_REGISTER:
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{
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UPECtrlReg tmpCtrl(_iValue);
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// Control register
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mmio->Register(base | PE_CTRL_REGISTER,
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MMIO::DirectRead<u16>(&m_Control.Hex),
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MMIO::ComplexWrite<u16>([](u32, u16 val) {
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UPECtrlReg tmpCtrl(val);
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if (tmpCtrl.PEToken) g_bSignalTokenInterrupt = 0;
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if (tmpCtrl.PEFinish) g_bSignalFinishInterrupt = 0;
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@ -317,27 +229,46 @@ void Write16(const u16 _iValue, const u32 _iAddress)
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m_Control.PEToken = 0; // this flag is write only
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m_Control.PEFinish = 0; // this flag is write only
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DEBUG_LOG(PIXELENGINE, "(w16) CTRL_REGISTER: 0x%04x", _iValue);
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DEBUG_LOG(PIXELENGINE, "(w16) CTRL_REGISTER: 0x%04x", val);
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UpdateInterrupts();
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}
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break;
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})
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);
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case PE_TOKEN_REG:
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PanicAlert("(w16) WTF? PowerPC program wrote token: %i", _iValue);
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//only the gx pipeline is supposed to be able to write here
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//g_token = _iValue;
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break;
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// Token register, readonly.
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mmio->Register(base | PE_TOKEN_REG,
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MMIO::DirectRead<u16>(&CommandProcessor::fifo.PEToken),
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MMIO::InvalidWrite<u16>()
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);
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default:
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WARN_LOG(PIXELENGINE, "(w16) unknown %04x @ %08x", _iValue, _iAddress);
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break;
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// BBOX registers, readonly and need to update a flag.
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for (int i = 0; i < 4; ++i)
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{
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mmio->Register(base | (PE_BBOX_LEFT + 2 * i),
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MMIO::ComplexRead<u16>([i](u32) {
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bbox_active = false;
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return bbox[i];
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}),
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MMIO::InvalidWrite<u16>()
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);
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}
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}
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void Read16(u16& _uReturnValue, const u32 _iAddress)
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{
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// HACK: Remove this function when the new MMIO interface is used.
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Memory::mmio_mapping->Read(_iAddress, _uReturnValue);
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}
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void Write16(const u16 _iValue, const u32 _iAddress)
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{
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// HACK: Remove this function when the new MMIO interface is used.
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Memory::mmio_mapping->Write(_iAddress, _iValue);
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}
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void Write32(const u32 _iValue, const u32 _iAddress)
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{
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WARN_LOG(PIXELENGINE, "(w32) 0x%08x @ 0x%08x IGNORING...",_iValue,_iAddress);
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// HACK: Remove this function when the new MMIO interface is used.
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Memory::mmio_mapping->Write(_iAddress, _iValue);
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}
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bool AllowIdleSkipping()
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