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https://github.com/dolphin-emu/dolphin.git
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JitArm64_RegCache: Use std::array where applicable
There's no need to use std::vector for fixed enum values.
This commit is contained in:
Lioncash
parent
7e40f1757e
commit
8811937756
2 changed files with 70 additions and 51 deletions
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@ -2,12 +2,18 @@
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// Licensed under GPLv2+
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// Refer to the license.txt file included.
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#include "Core/PowerPC/JitArm64/Jit.h"
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#include "Core/PowerPC/JitArm64/JitArm64_RegCache.h"
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#include <algorithm>
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#include <array>
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#include <cstddef>
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#include <vector>
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#include "Common/Assert.h"
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#include "Common/BitSet.h"
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#include "Common/CommonTypes.h"
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#include "Common/Logging/Log.h"
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#include "Core/PowerPC/JitArm64/JitArm64_RegCache.h"
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#include "Core/PowerPC/JitArm64/Jit.h"
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using namespace Arm64Gen;
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@ -66,18 +72,22 @@ void Arm64RegCache::UnlockRegister(ARM64Reg host_reg)
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void Arm64RegCache::FlushMostStaleRegister()
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{
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u32 most_stale_preg = 0;
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size_t most_stale_preg = 0;
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u32 most_stale_amount = 0;
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for (u32 i = 0; i < 32; ++i)
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for (size_t i = 0; i < m_guest_registers.size(); ++i)
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{
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u32 last_used = m_guest_registers[i].GetLastUsed();
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if (last_used > most_stale_amount && (m_guest_registers[i].GetType() != REG_NOTLOADED &&
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m_guest_registers[i].GetType() != REG_IMM))
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const auto& reg = m_guest_registers[i];
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const u32 last_used = reg.GetLastUsed();
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if (last_used > most_stale_amount &&
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(reg.GetType() != REG_NOTLOADED && reg.GetType() != REG_IMM))
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{
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most_stale_preg = i;
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most_stale_amount = last_used;
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}
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}
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FlushRegister(most_stale_preg, false);
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}
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@ -88,13 +98,14 @@ void Arm64GPRCache::Start(PPCAnalyst::BlockRegStats& stats)
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bool Arm64GPRCache::IsCalleeSaved(ARM64Reg reg)
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{
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static std::vector<ARM64Reg> callee_regs = {
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static constexpr std::array<ARM64Reg, 11> callee_regs{{
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X28, X27, X26, X25, X24, X23, X22, X21, X20, X19, INVALID_REG,
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};
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}};
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return std::find(callee_regs.begin(), callee_regs.end(), EncodeRegTo64(reg)) != callee_regs.end();
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}
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void Arm64GPRCache::FlushRegister(u32 preg, bool maintain_state)
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void Arm64GPRCache::FlushRegister(size_t preg, bool maintain_state)
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{
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OpArg& reg = m_guest_registers[preg];
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if (reg.GetType() == REG_REG)
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@ -132,7 +143,7 @@ void Arm64GPRCache::FlushRegister(u32 preg, bool maintain_state)
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void Arm64GPRCache::FlushRegisters(BitSet32 regs, bool maintain_state)
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{
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for (int i = 0; i < 32; ++i)
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for (size_t i = 0; i < m_guest_registers.size(); ++i)
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{
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if (regs[i])
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{
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@ -168,7 +179,7 @@ void Arm64GPRCache::FlushRegisters(BitSet32 regs, bool maintain_state)
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void Arm64GPRCache::Flush(FlushMode mode, PPCAnalyst::CodeOp* op)
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{
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BitSet32 to_flush;
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for (int i = 0; i < 32; ++i)
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for (size_t i = 0; i < m_guest_registers.size(); ++i)
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{
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bool flush = true;
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if (m_guest_registers[i].GetType() == REG_REG)
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@ -183,7 +194,7 @@ void Arm64GPRCache::Flush(FlushMode mode, PPCAnalyst::CodeOp* op)
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FlushRegisters(to_flush, mode == FLUSH_MAINTAIN_STATE);
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}
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ARM64Reg Arm64GPRCache::R(u32 preg)
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ARM64Reg Arm64GPRCache::R(size_t preg)
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{
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OpArg& reg = m_guest_registers[preg];
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IncrementAllUsed();
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@ -223,7 +234,7 @@ ARM64Reg Arm64GPRCache::R(u32 preg)
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return INVALID_REG;
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}
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void Arm64GPRCache::SetImmediate(u32 preg, u32 imm)
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void Arm64GPRCache::SetImmediate(size_t preg, u32 imm)
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{
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OpArg& reg = m_guest_registers[preg];
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if (reg.GetType() == REG_REG)
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@ -231,7 +242,7 @@ void Arm64GPRCache::SetImmediate(u32 preg, u32 imm)
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reg.LoadToImm(imm);
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}
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void Arm64GPRCache::BindToRegister(u32 preg, bool do_load)
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void Arm64GPRCache::BindToRegister(size_t preg, bool do_load)
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{
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OpArg& reg = m_guest_registers[preg];
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@ -250,13 +261,13 @@ void Arm64GPRCache::BindToRegister(u32 preg, bool do_load)
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void Arm64GPRCache::GetAllocationOrder()
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{
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// Callee saved registers first in hopes that we will keep everything stored there first
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const std::vector<ARM64Reg> allocation_order = {
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static constexpr std::array<ARM64Reg, 29> allocation_order{{
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// Callee saved
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W27, W26, W25, W24, W23, W22, W21, W20, W19,
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// Caller saved
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W18, W17, W16, W15, W14, W13, W12, W11, W10, W9, W8, W7, W6, W5, W4, W3, W2, W1, W0, W30,
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};
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}};
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for (ARM64Reg reg : allocation_order)
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m_host_registers.push_back(HostReg(reg));
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@ -273,9 +284,9 @@ BitSet32 Arm64GPRCache::GetCallerSavedUsed()
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void Arm64GPRCache::FlushByHost(ARM64Reg host_reg)
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{
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for (int i = 0; i < 32; ++i)
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for (size_t i = 0; i < m_guest_registers.size(); ++i)
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{
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OpArg& reg = m_guest_registers[i];
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const OpArg& reg = m_guest_registers[i];
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if (reg.GetType() == REG_REG && reg.GetReg() == host_reg)
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{
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FlushRegister(i, false);
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@ -287,10 +298,11 @@ void Arm64GPRCache::FlushByHost(ARM64Reg host_reg)
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// FPR Cache
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void Arm64FPRCache::Flush(FlushMode mode, PPCAnalyst::CodeOp* op)
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{
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for (int i = 0; i < 32; ++i)
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for (size_t i = 0; i < m_guest_registers.size(); ++i)
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{
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if (m_guest_registers[i].GetType() != REG_NOTLOADED &&
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m_guest_registers[i].GetType() != REG_IMM)
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const RegType reg_type = m_guest_registers[i].GetType();
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if (reg_type != REG_NOTLOADED && reg_type != REG_IMM)
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{
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// XXX: Determine if we can keep a register in the lower 64bits
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// Which will allow it to be callee saved.
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@ -299,7 +311,7 @@ void Arm64FPRCache::Flush(FlushMode mode, PPCAnalyst::CodeOp* op)
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}
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}
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ARM64Reg Arm64FPRCache::R(u32 preg, RegType type)
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ARM64Reg Arm64FPRCache::R(size_t preg, RegType type)
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{
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OpArg& reg = m_guest_registers[preg];
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IncrementAllUsed();
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@ -408,7 +420,7 @@ ARM64Reg Arm64FPRCache::R(u32 preg, RegType type)
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return INVALID_REG;
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}
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ARM64Reg Arm64FPRCache::RW(u32 preg, RegType type)
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ARM64Reg Arm64FPRCache::RW(size_t preg, RegType type)
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{
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OpArg& reg = m_guest_registers[preg];
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@ -470,13 +482,14 @@ ARM64Reg Arm64FPRCache::RW(u32 preg, RegType type)
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void Arm64FPRCache::GetAllocationOrder()
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{
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const std::vector<ARM64Reg> allocation_order = {// Callee saved
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Q8, Q9, Q10, Q11, Q12, Q13, Q14, Q15,
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static constexpr std::array<ARM64Reg, 32> allocation_order{{
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// Callee saved
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Q8, Q9, Q10, Q11, Q12, Q13, Q14, Q15,
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// Caller saved
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Q16, Q17, Q18, Q19, Q20, Q21, Q22, Q23, Q24, Q25,
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Q26, Q27, Q28, Q29, Q30, Q31, Q7, Q6, Q5, Q4, Q3,
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Q2, Q1, Q0};
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// Caller saved
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Q16, Q17, Q18, Q19, Q20, Q21, Q22, Q23, Q24, Q25, Q26, Q27, Q28, Q29, Q30, Q31, Q7, Q6, Q5,
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Q4, Q3, Q2, Q1, Q0,
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}};
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for (ARM64Reg reg : allocation_order)
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m_host_registers.push_back(HostReg(reg));
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@ -484,10 +497,12 @@ void Arm64FPRCache::GetAllocationOrder()
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void Arm64FPRCache::FlushByHost(ARM64Reg host_reg)
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{
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for (int i = 0; i < 32; ++i)
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for (size_t i = 0; i < m_guest_registers.size(); ++i)
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{
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OpArg& reg = m_guest_registers[i];
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if ((reg.GetType() != REG_NOTLOADED && reg.GetType() != REG_IMM) && reg.GetReg() == host_reg)
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const OpArg& reg = m_guest_registers[i];
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const RegType reg_type = reg.GetType();
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if ((reg_type != REG_NOTLOADED && reg_type != REG_IMM) && reg.GetReg() == host_reg)
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{
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FlushRegister(i, false);
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return;
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@ -497,13 +512,14 @@ void Arm64FPRCache::FlushByHost(ARM64Reg host_reg)
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bool Arm64FPRCache::IsCalleeSaved(ARM64Reg reg)
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{
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static std::vector<ARM64Reg> callee_regs = {
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static constexpr std::array<ARM64Reg, 9> callee_regs{{
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Q8, Q9, Q10, Q11, Q12, Q13, Q14, Q15, INVALID_REG,
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};
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}};
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return std::find(callee_regs.begin(), callee_regs.end(), reg) != callee_regs.end();
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}
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void Arm64FPRCache::FlushRegister(u32 preg, bool maintain_state)
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void Arm64FPRCache::FlushRegister(size_t preg, bool maintain_state)
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{
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OpArg& reg = m_guest_registers[preg];
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ARM64Reg host_reg = reg.GetReg();
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@ -580,14 +596,14 @@ BitSet32 Arm64FPRCache::GetCallerSavedUsed()
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return registers;
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}
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bool Arm64FPRCache::IsSingle(u32 preg, bool lower_only)
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bool Arm64FPRCache::IsSingle(size_t preg, bool lower_only)
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{
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RegType type = m_guest_registers[preg].GetType();
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return type == REG_REG_SINGLE || type == REG_DUP_SINGLE ||
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(lower_only && type == REG_LOWER_PAIR_SINGLE);
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}
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void Arm64FPRCache::FixSinglePrecision(u32 preg)
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void Arm64FPRCache::FixSinglePrecision(size_t preg)
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{
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OpArg& reg = m_guest_registers[preg];
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ARM64Reg host_reg = reg.GetReg();
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@ -4,10 +4,13 @@
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#pragma once
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#include <array>
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#include <cstddef>
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#include <memory>
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#include <vector>
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#include "Common/Arm64Emitter.h"
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#include "Common/CommonTypes.h"
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#include "Core/PowerPC/Gekko.h"
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#include "Core/PowerPC/PPCAnalyst.h"
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#include "Core/PowerPC/PowerPC.h"
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@ -171,7 +174,7 @@ protected:
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// Flushes a guest register by host provided
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virtual void FlushByHost(ARM64Reg host_reg) = 0;
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virtual void FlushRegister(u32 preg, bool maintain_state) = 0;
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virtual void FlushRegister(size_t preg, bool maintain_state) = 0;
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virtual void FlushRegisters(BitSet32 regs, bool maintain_state) = 0;
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@ -196,7 +199,7 @@ protected:
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// Our guest GPRs
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// PowerPC has 32 GPRs
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// PowerPC also has 32 paired FPRs
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OpArg m_guest_registers[32];
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std::array<OpArg, 32> m_guest_registers;
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// Register stats for the current block
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PPCAnalyst::BlockRegStats* m_reg_stats;
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@ -213,16 +216,16 @@ public:
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// Returns a guest register inside of a host register
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// Will dump an immediate to the host register as well
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ARM64Reg R(u32 preg);
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ARM64Reg R(size_t preg);
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// Set a register to an immediate
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void SetImmediate(u32 preg, u32 imm);
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void SetImmediate(size_t preg, u32 imm);
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// Returns if a register is set as an immediate
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bool IsImm(u32 reg) const { return m_guest_registers[reg].GetType() == REG_IMM; }
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bool IsImm(size_t reg) const { return m_guest_registers[reg].GetType() == REG_IMM; }
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// Gets the immediate that a register is set to
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u32 GetImm(u32 reg) const { return m_guest_registers[reg].GetImm(); }
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void BindToRegister(u32 preg, bool do_load);
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u32 GetImm(size_t reg) const { return m_guest_registers[reg].GetImm(); }
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void BindToRegister(size_t preg, bool do_load);
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BitSet32 GetCallerSavedUsed() override;
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@ -233,7 +236,7 @@ protected:
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// Flushes a guest register by host provided
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void FlushByHost(ARM64Reg host_reg) override;
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void FlushRegister(u32 preg, bool maintain_state) override;
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void FlushRegister(size_t preg, bool maintain_state) override;
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void FlushRegisters(BitSet32 regs, bool maintain_state) override;
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@ -250,15 +253,15 @@ public:
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// Returns a guest register inside of a host register
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// Will dump an immediate to the host register as well
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ARM64Reg R(u32 preg, RegType type = REG_LOWER_PAIR);
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ARM64Reg R(size_t preg, RegType type = REG_LOWER_PAIR);
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ARM64Reg RW(u32 preg, RegType type = REG_LOWER_PAIR);
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ARM64Reg RW(size_t preg, RegType type = REG_LOWER_PAIR);
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BitSet32 GetCallerSavedUsed() override;
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bool IsSingle(u32 preg, bool lower_only = false);
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bool IsSingle(size_t preg, bool lower_only = false);
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void FixSinglePrecision(u32 preg);
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void FixSinglePrecision(size_t preg);
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protected:
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// Get the order of the host registers
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@ -267,7 +270,7 @@ protected:
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// Flushes a guest register by host provided
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void FlushByHost(ARM64Reg host_reg) override;
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void FlushRegister(u32 preg, bool maintain_state) override;
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void FlushRegister(size_t preg, bool maintain_state) override;
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void FlushRegisters(BitSet32 regs, bool maintain_state) override;
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