From d5e342f22912dbe0e66ee610488783dbc5ecde80 Mon Sep 17 00:00:00 2001 From: Fiora Date: Sun, 11 Jan 2015 10:39:44 -0800 Subject: [PATCH] JIT: fix regression in non-fastmem for psq_st --- Source/Core/Core/PowerPC/Jit64/Jit_LoadStorePaired.cpp | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Source/Core/Core/PowerPC/Jit64/Jit_LoadStorePaired.cpp b/Source/Core/Core/PowerPC/Jit64/Jit_LoadStorePaired.cpp index 0196f5deec..f84f27f7dc 100644 --- a/Source/Core/Core/PowerPC/Jit64/Jit_LoadStorePaired.cpp +++ b/Source/Core/Core/PowerPC/Jit64/Jit_LoadStorePaired.cpp @@ -38,7 +38,9 @@ void Jit64::psq_stXX(UGeckoInstruction inst) int storeOffset = 0; gpr.BindToRegister(a, true, update); X64Reg addr = gpr.RX(a); - if (update && js.memcheck) + // TODO: this is kind of ugly :/ we should probably create a universal load/store address calculation + // function that handles all these weird cases, e.g. how non-fastmem loadstores clobber addresses. + if ((update && js.memcheck) || !SConfig::GetInstance().m_LocalCoreStartupParameter.bFastmem) { addr = RSCRATCH2; MOV(32, R(addr), gpr.R(a));