JIT: fix dumb mistake in crclr optimization patch

This commit is contained in:
Fiora 2014-11-02 20:08:18 -08:00
parent 204598a082
commit e729fc4a28

View file

@ -91,38 +91,25 @@ void Jit64::SetCRFieldBit(int field, int bit, Gen::X64Reg in)
void Jit64::ClearCRFieldBit(int field, int bit) void Jit64::ClearCRFieldBit(int field, int bit)
{ {
MOV(64, R(RSCRATCH2), PPCSTATE(cr_val[field]));
if (bit != CR_GT_BIT)
{
TEST(64, R(RSCRATCH2), R(RSCRATCH2));
FixupBranch dont_clear_gt = J_CC(CC_NZ);
BTS(64, R(RSCRATCH2), Imm8(63));
SetJumpTarget(dont_clear_gt);
}
switch (bit) switch (bit)
{ {
case CR_SO_BIT: // set bit 61 to input case CR_SO_BIT:
BTR(64, R(RSCRATCH2), Imm8(61)); BTR(64, PPCSTATE(cr_val[field]), Imm8(61));
break; break;
case CR_EQ_BIT: // clear low 32 bits, set bit 0 to !input case CR_EQ_BIT:
SHR(64, R(RSCRATCH2), Imm8(32)); OR(64, PPCSTATE(cr_val[field]), Imm8(1));
SHL(64, R(RSCRATCH2), Imm8(32));
break; break;
case CR_GT_BIT: // set bit 63 to !input case CR_GT_BIT:
BTR(64, R(RSCRATCH2), Imm8(63)); BTS(64, PPCSTATE(cr_val[field]), Imm8(63));
break; break;
case CR_LT_BIT: // set bit 62 to input case CR_LT_BIT:
BTR(64, R(RSCRATCH2), Imm8(62)); BTR(64, PPCSTATE(cr_val[field]), Imm8(62));
break; break;
} }
// We don't need to set bit 32; the cases where that's needed only come up when setting bits, not clearing.
BTS(64, R(RSCRATCH2), Imm8(32));
MOV(64, PPCSTATE(cr_val[field]), R(RSCRATCH2));
} }
FixupBranch Jit64::JumpIfCRFieldBit(int field, int bit, bool jump_if_set) FixupBranch Jit64::JumpIfCRFieldBit(int field, int bit, bool jump_if_set)