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https://github.com/dolphin-emu/dolphin.git
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f5c550e9cb
Fixes Bomberman Jetters in single core mode. When single core mode pauses the CPU to execute the GPU FIFO it greedily executes the whole thing. Before this commit, Finish and Token interrupts would happen instantly, not even taking into account how long the current FIFO window has taken to execute. The interrupts would be effectively backdated to the start of this execution window. This commit does two things: It pipes the current FIFO window execution time though to the interrupt scheduling and it enforces a minimum delay of 500 cycles before an interrupt will be fired.
68 lines
1.8 KiB
C++
68 lines
1.8 KiB
C++
// Copyright 2008 Dolphin Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#pragma once
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#include "Common/CommonTypes.h"
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class PointerWrap;
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namespace MMIO
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{
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class Mapping;
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}
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namespace PixelEngine
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{
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// internal hardware addresses
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enum
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{
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PE_ZCONF = 0x00, // Z Config
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PE_ALPHACONF = 0x02, // Alpha Config
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PE_DSTALPHACONF = 0x04, // Destination Alpha Config
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PE_ALPHAMODE = 0x06, // Alpha Mode Config
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PE_ALPHAREAD = 0x08, // Alpha Read
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PE_CTRL_REGISTER = 0x0a, // Control
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PE_TOKEN_REG = 0x0e, // Token
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PE_BBOX_LEFT = 0x10, // Bounding Box Left Pixel
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PE_BBOX_RIGHT = 0x12, // Bounding Box Right Pixel
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PE_BBOX_TOP = 0x14, // Bounding Box Top Pixel
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PE_BBOX_BOTTOM = 0x16, // Bounding Box Bottom Pixel
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// NOTE: Order not verified
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// These indicate the number of quads that are being used as input/output for each particular
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// stage
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PE_PERF_ZCOMP_INPUT_ZCOMPLOC_L = 0x18,
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PE_PERF_ZCOMP_INPUT_ZCOMPLOC_H = 0x1a,
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PE_PERF_ZCOMP_OUTPUT_ZCOMPLOC_L = 0x1c,
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PE_PERF_ZCOMP_OUTPUT_ZCOMPLOC_H = 0x1e,
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PE_PERF_ZCOMP_INPUT_L = 0x20,
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PE_PERF_ZCOMP_INPUT_H = 0x22,
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PE_PERF_ZCOMP_OUTPUT_L = 0x24,
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PE_PERF_ZCOMP_OUTPUT_H = 0x26,
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PE_PERF_BLEND_INPUT_L = 0x28,
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PE_PERF_BLEND_INPUT_H = 0x2a,
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PE_PERF_EFB_COPY_CLOCKS_L = 0x2c,
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PE_PERF_EFB_COPY_CLOCKS_H = 0x2e,
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};
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// ReadMode specifies the returned alpha channel for EFB peeks
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union UPEAlphaReadReg
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{
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u16 Hex;
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struct
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{
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u16 ReadMode : 2;
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u16 : 14;
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};
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};
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void Init();
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void DoState(PointerWrap& p);
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void RegisterMMIO(MMIO::Mapping* mmio, u32 base);
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// gfx backend support
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void SetToken(const u16 token, const bool interrupt, int cycle_delay);
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void SetFinish(int cycle_delay);
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UPEAlphaReadReg GetAlphaReadMode();
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} // namespace PixelEngine
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