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9de77b7c23
Set the x87 precision, even on x64. Since we are using x87 instructions in the JIT now, we can't guarantee that x87 precision will never influence Dolphin on x64.
97 lines
2.3 KiB
C++
97 lines
2.3 KiB
C++
// Copyright 2013 Dolphin Emulator Project
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// Licensed under GPLv2
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// Refer to the license.txt file included.
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#include <cfenv>
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#include "Common/Common.h"
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#include "Common/CPUDetect.h"
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#include "Common/FPURoundMode.h"
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#ifdef _WIN32
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# include <mmintrin.h>
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#else
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# include <xmmintrin.h>
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#endif
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namespace FPURoundMode
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{
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// Get the default SSE states here.
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static u32 saved_sse_state = _mm_getcsr();
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static const u32 default_sse_state = _mm_getcsr();
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void SetRoundMode(int mode)
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{
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// Convert PowerPC to native rounding mode.
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const int rounding_mode_lut[] = {
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FE_TONEAREST,
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FE_TOWARDZERO,
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FE_UPWARD,
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FE_DOWNWARD
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};
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fesetround(rounding_mode_lut[mode]);
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}
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void SetPrecisionMode(PrecisionMode mode)
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{
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#ifdef _WIN32
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_control87(_PC_53, MCW_PC);
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#else
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const unsigned short PRECISION_MASK = 3 << 8;
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const unsigned short precision_table[] = {
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0 << 8, // 24 bits
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2 << 8, // 53 bits
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3 << 8, // 64 bits
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};
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unsigned short cw;
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asm ("fnstcw %0" : "=m" (cw));
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cw = (cw & ~PRECISION_MASK) | precision_table[mode];
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asm ("fldcw %0" : : "m" (cw));
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#endif
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}
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void SetSIMDMode(int rounding_mode, bool non_ieee_mode)
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{
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// OR-mask for disabling FPU exceptions (bits 7-12 in the MXCSR register)
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const u32 EXCEPTION_MASK = 0x1F80;
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// Denormals-Are-Zero (non-IEEE mode: denormal inputs are set to +/- 0)
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const u32 DAZ = 0x40;
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// Flush-To-Zero (non-IEEE mode: denormal outputs are set to +/- 0)
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const u32 FTZ = 0x8000;
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// lookup table for FPSCR.RN-to-MXCSR.RC translation
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static const u32 simd_rounding_table[] =
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{
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(0 << 13) | EXCEPTION_MASK, // nearest
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(3 << 13) | EXCEPTION_MASK, // -inf
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(2 << 13) | EXCEPTION_MASK, // +inf
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(1 << 13) | EXCEPTION_MASK, // zero
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};
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u32 csr = simd_rounding_table[rounding_mode];
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// Some initial steppings of Pentium 4 CPUs support FTZ but not DAZ.
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// They will not flush input operands but flushing outputs only is better than nothing.
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static const u32 denormalLUT[2] =
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{
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FTZ, // flush-to-zero only
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FTZ | DAZ, // flush-to-zero and denormals-are-zero (may not be supported)
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};
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if (non_ieee_mode)
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{
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csr |= denormalLUT[cpu_info.bFlushToZero];
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}
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_mm_setcsr(csr);
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}
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void SaveSIMDState()
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{
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saved_sse_state = _mm_getcsr();
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}
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void LoadSIMDState()
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{
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_mm_setcsr(saved_sse_state);
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}
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void LoadDefaultSIMDState()
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{
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_mm_setcsr(default_sse_state);
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}
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}
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