pierre e07a91930d The result of the last texenv stage is used regardless of destination register ... The real hardware probably always sends the result of its computations to the alpha test/fog units, in parallel to its registers, but those only take the result of the last texenv stage. This makes grass show up in ZTP, where the last texenv stage oddly writes to reg #3 instead of #0. git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@5462 8ced0084-cf51-0410-be5f-012b33b47a6e		2010-05-22 16:54:34 +00:00
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Src	The result of the last texenv stage is used regardless of destination register	2010-05-22 16:54:34 +00:00
OpenCL.rules	update OpenCL.rules to work on paths that include spaces	2009-10-21 01:00:27 +00:00
VideoCommon.vcproj	Fix an issue with BPMEM_LOADTLUT, thanks to revned @ issue 1831, also fix a speed issue int the FIFO loop introduced recently (ZWW was ~20% slower)	2009-12-28 19:13:06 +00:00