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https://github.com/dolphin-emu/dolphin.git
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664cea45c7
Using Unix tools to operate on a tree containing filename with spaces in them is really annoying, so rename the handful of instances where there were spaces. Host.cpp has never been used. Games tend to lookup the following directories that we don't yet have anything to put in, so prepopulate them in Data/User/Wii: title/00010001 title/00010002 title/00010003 title/00010004 title/00010005 title/00010006 title/00010007 meta shared2/title Set eol-style native on a number of text files which didn't already have it. git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@5572 8ced0084-cf51-0410-be5f-012b33b47a6e
275 lines
5.3 KiB
PHP
275 lines
5.3 KiB
PHP
; This is the trojan program we send to the DSP from DSPSpy to figure it out.
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REGS_BASE: equ 0x0f80
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MEM_HI: equ 0x0f7E
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MEM_LO: equ 0x0f7F
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; Interrupt vectors 8 vectors, 2 opcodes each
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jmp irq0
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jmp irq1
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jmp irq2
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jmp irq3
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jmp irq4
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jmp irq5
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jmp irq6
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jmp irq7
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; Main code (and normal entrypoint) at 0x10
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sbset #0x02
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sbset #0x03
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sbclr #0x04
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sbset #0x05
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sbset #0x06
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s16
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lri $CR, #0x00ff
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clr $acc1
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clr $acc0
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; get address of memory dump and copy it to DRAM
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call 0x807e
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si @DMBH, #0x8888
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si @DMBL, #0xdead
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si @DIRQ, #0x0001
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call 0x8078
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andi $ac0.m, #0x7fff
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lrs $ac1.m, @CMBL
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sr @MEM_HI, $ac0.m
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sr @MEM_LO, $ac1.m
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lri $ax0.l, #0
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lri $ax1.l, #0 ;(DSP_CR_IMEM | DSP_CR_TO_CPU)
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lri $ax0.h, #0x2000
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lr $ac0.l, @MEM_HI
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lr $ac0.m, @MEM_LO
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call do_dma
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; get address of registers and DMA them to ram
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call 0x807e
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si @DMBH, #0x8888
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si @DMBL, #0xbeef
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si @DIRQ, #0x0001
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call 0x8078
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andi $ac0.m, #0x7fff
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lrs $ac1.m, @CMBL
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sr @MEM_HI, $ac0.m
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sr @MEM_LO, $ac1.m
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lri $ax0.l, #REGS_BASE
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lri $ax1.l, #0 ;(DSP_CR_IMEM | DSP_CR_TO_CPU)
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lri $ax0.h, #0x80
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lr $ac0.l, @MEM_HI
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lr $ac0.m, @MEM_LO
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call do_dma
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; Read in all the registers from RAM
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lri $ar0, #REGS_BASE+1
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lrri $ar1, @$ar0
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lrri $ar2, @$ar0
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lrri $ar3, @$ar0
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lrri $ix0, @$ar0
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lrri $ix1, @$ar0
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lrri $ix2, @$ar0
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lrri $ix3, @$ar0
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lrri $wr0, @$ar0
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lrri $wr1, @$ar0
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lrri $wr2, @$ar0
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lrri $wr3, @$ar0
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lrri $st0, @$ar0
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lrri $st1, @$ar0
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lrri $st2, @$ar0
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lrri $st3, @$ar0
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lrri $ac0.h, @$ar0
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lrri $ac1.h, @$ar0
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lrri $cr, @$ar0
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lrri $sr, @$ar0
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lrri $prod.l, @$ar0
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lrri $prod.m1, @$ar0
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lrri $prod.h, @$ar0
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lrri $prod.m2, @$ar0
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lrri $ax0.l, @$ar0
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lrri $ax1.l, @$ar0
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lrri $ax0.h, @$ar0
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lrri $ax1.h, @$ar0
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lrri $ac0.l, @$ar0
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lrri $ac1.l, @$ar0
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lrri $ac0.m, @$ar0
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lrri $ac1.m, @$ar0
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lr $ar0, @REGS_BASE
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jmp start_of_test
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; This is where we jump when we're done testing, see above.
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; We just fall into a loop, playing dead until someone resets the DSP.
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end_of_test:
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jmp end_of_test
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; Utility function to do DMA.
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do_dma:
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sr @DSMAH, $ac0.l
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sr @DSMAL, $ac0.m
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sr @DSPA, $ax0.l
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sr @DSCR, $ax1.l
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sr @DSBL, $ax0.h ; This kicks off the DMA.
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call 0x863d ; Wait for DMA to complete by watching a bit in DSCR.
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ret
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; IRQ handlers. Just send back exception# and die
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irq0:
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lri $ac0.m, #0x0000
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jmp irq
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irq1:
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lri $ac0.m, #0x0001
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jmp irq
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irq2:
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lri $ac0.m, #0x0002
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jmp irq
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irq3:
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lri $ac0.m, #0x0003
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jmp irq
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irq4:
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lri $ac0.m, #0x0004
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jmp irq
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irq5:
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lri $ac0.m, #0x0005
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jmp irq
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irq6:
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lri $ac0.m, #0x0006
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jmp irq
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irq7:
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lri $ac0.m, #0x0007
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irq:
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lrs $ac1.m, @DMBH
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andcf $ac1.m, #0x8000
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jlz irq
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si @DMBH, #0x8bad
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;sr @DMBL, $wr3 ; ???
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sr @DMBL, $ac0.m ; Exception number
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si @DIRQ, #0x0001
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halt ; Through some magic this allows us to properly ack the exception in dspspy
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;rti ; allow dumping of ucodes which cause exceptions...probably not safe at all
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; DMA:s the current state of the registers back to the PowerPC. To do this,
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; it must write the contents of all regs to DRAM.
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; Unfortunately, this loop uses ar0 so it's best to use AR1 and friends for testing
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; when messing with indexing.
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send_back:
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; make state safe.
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set16
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; store registers to reg table
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sr @REGS_BASE, $ar0
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lri $ar0, #(REGS_BASE + 1)
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srri @$ar0, $ar1
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srri @$ar0, $ar2
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srri @$ar0, $ar3
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srri @$ar0, $ix0
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srri @$ar0, $ix1
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srri @$ar0, $ix2
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srri @$ar0, $ix3
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srri @$ar0, $wr0
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srri @$ar0, $wr1
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srri @$ar0, $wr2
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srri @$ar0, $wr3
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srri @$ar0, $st0
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srri @$ar0, $st1
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srri @$ar0, $st2
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srri @$ar0, $st3
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srri @$ar0, $ac0.h
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srri @$ar0, $ac1.h
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srri @$ar0, $cr
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srri @$ar0, $sr
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srri @$ar0, $prod.l
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srri @$ar0, $prod.m1
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srri @$ar0, $prod.h
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srri @$ar0, $prod.m2
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srri @$ar0, $ax0.l
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srri @$ar0, $ax1.l
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srri @$ar0, $ax0.h
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srri @$ar0, $ax1.h
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srri @$ar0, $ac0.l
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srri @$ar0, $ac1.l
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srri @$ar0, $ac0.m
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srri @$ar0, $ac1.m
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; Regs are stored. Prepare DMA.
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lri $ax0.l, #0x0000
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lri $ax1.l, #1 ;(DSP_CR_IMEM | DSP_CR_TO_CPU)
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lri $ax0.h, #0x200
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lr $ac0.l, @MEM_HI
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lr $ac0.m, @MEM_LO
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; Now, why are we looping here?
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lri $ar1, #8+8
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bloop $ar1, dma_copy
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call do_dma
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addi $ac0.m, #0x200
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mrr $ac1.m, $ax0.l
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addi $ac1.m, #0x100
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dma_copy:
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mrr $ax0.l, $ac1.m
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; Wait for the CPU to send us a mail.
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call 0x807e
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si @DMBH, #0x8888
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si @DMBL, #0xfeeb
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si @DIRQ, #0x0001
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; wait for the CPU to recieve our response before we execute the next op
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call 0x8078
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andi $ac0.m, #0x7fff
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lrs $ac1.m, @CMBL
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; Restore all regs again so we're ready to execute another op.
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lri $ar0, #REGS_BASE+1
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lrri $ar1, @$ar0
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lrri $ar2, @$ar0
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lrri $ar3, @$ar0
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lrri $ix0, @$ar0
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lrri $ix1, @$ar0
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lrri $ix2, @$ar0
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lrri $ix3, @$ar0
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lrri $wr0, @$ar0
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lrri $wr1, @$ar0
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lrri $wr2, @$ar0
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lrri $wr3, @$ar0
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lrri $st0, @$ar0
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lrri $st1, @$ar0
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lrri $st2, @$ar0
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lrri $st3, @$ar0
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lrri $ac0.h, @$ar0
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lrri $ac1.h, @$ar0
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lrri $cr, @$ar0
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lrri $sr, @$ar0
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lrri $prod.l, @$ar0
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lrri $prod.m1, @$ar0
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lrri $prod.h, @$ar0
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lrri $prod.m2, @$ar0
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lrri $ax0.l, @$ar0
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lrri $ax1.l, @$ar0
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lrri $ax0.h, @$ar0
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lrri $ax1.h, @$ar0
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lrri $ac0.l, @$ar0
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lrri $ac1.l, @$ar0
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lrri $ac0.m, @$ar0
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lrri $ac1.m, @$ar0
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lr $ar0, @REGS_BASE
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ret ; from send_back
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; If you are in set40 mode, use this instead of send_back if you want to stay
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; in set40 mode.
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send_back_40:
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set16
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call send_back
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set40
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ret
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; Obviously this must be included directly before your test code
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start_of_test:
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